Join us

1、负责数字IC模块的设计与开发，确保设计符合项目需求和技术规范；
2、参与芯片架构设计及测试验证流程，提升产品性能和可靠性；
3、与跨职能团队合作，解决设计过程中的技术难题，推动项目进展。

1、拥有微电子、电子工程或相关专业背景，重点本科及以上学历；
2、五年以上相关工作经验，其中须有存储相关行业经验（emmc，ufs，ssd），且需要具有soc层面的经验；
3、具有复杂SOC设计的经验，并具体设计包括或不限于io，emmc/ufs/pcie ip 集成，clock/reset，low power设计，nand phy/controller，arm/risc-v cpu集成等其他存储主控SOC主要模块的相关经验；
4、具有积极的工作态度、良好的团队合作精神；
5、具有良好的沟通能力，具备良好的学习新技术的能力。

Responsible for the logic synthesis, timing optimization, and preliminary convergence of power consumption area for SOC, key modules, and subsystems in chip design projects, ensuring the delivery of high-quality gate level netlists that meet PPA goals and laying a solid foundation for backend physical design. Continuously optimize comprehensive processes and methodologies to improve efficiency and quality.

1. More than 5 years of relevant work experience, with a key bachelor's degree or above;
2. Have actual project experience in chip development projects, including DC, Lint, CDC, Morphology, VCLP, PTPX, and UPF;
3. Proficient in programming languages such as TCL, Python, Make, Shell, etc;
4. Have project experience in Design Constraint, Timing Exception, and Asynchronous Path Constraint;
5. Have experience working with Design Service, analyzing Clock Jitter and signal pulse width, estimating SOC power consumption (initial power consumption estimation, mid-term power consumption estimation, and pre chip power consumption evaluation), and have practical project experience in die size analysis;
6. Experience in wafer fabrication and mass production with SMIC 28nm and above processes is preferred.

1. Responsible for the work of advanced integrated circuit (IC) verification engineers.
2. Participate in the verification of complex system on chip (SOC), including module level UVM verification and SOC/subsystem level C verification.
3. Responsible for building and optimizing the validation environment, validation methodology, validation process, and proprietary behavior model (VIP).
4. Responsible for chip verification and testing to ensure that the design meets functional and performance requirements.
5. Solve technical difficulties encountered during the verification process.

1. More than 5 years of work experience, with a key bachelor's degree or above;
2. Experience in verification related to the storage industry is preferred, including EMMC, UFS, SSD, etc;
3. Proficient in SOC verification, with experience in low power verification, FTL FW design, e2e SOC verification, eMMC/UFS/SSD front-end/back-end verification;

1. In the early stage of hardware development, Asic main control function level verification and FPGA verification.
2. After the completion of Asic development, mass production firmware design, specification design, and factory testing passed.
3. When meeting customer production requirements, firmware design meets customer expectations and necessary design changes or new features are added based on customer requirements.
4. After firmware mass production, maintain customer yield and subsequent analysis of defective products and firmware support.
5. Support customer and market development schedule requirements.
6. Internally responsible for training firmware fundamentals and necessary support personnel such as the marketing department, FAE, AE, etc.
7. Responsible for the development of firmware intellectual property and analysis of competitor intellectual property.
8. Responsible for the design and development of firmware simulator development platform

1. Familiar with development and debugging on ARM or RISC-V controllers, able to independently develop and assist in training.
2. Supports verification of AISC and FPGA, can be independently developed, and can assist in training.
3. Proficient in C programming and debugging, assisting with coding review work
4. Experience in firmware development for UFS direction chip products

1. Responsible for the module verification of FPGA and Silicon in the UFS project of the company, ensuring the completeness and correctness of the verification
2. Undertake the development and validation of UFS project test cases
3. Undertake the analysis and resolution of UFS project testing issues
4. Undertake the improvement and optimization of UFS project testing coverage
5. Responsible for writing technical documents.

1. Bachelor's degree or above in key majors such as microelectronics, computer science, communication engineering, etc., with more than 3 years of experience in chip testing and verification
2. Familiar with eMMC/UFS/SSD/NAND protocols and chip testing experience
3. Experience in board design/substrate design/si, pi evaluation experience is preferred
4. Have experience in coordinating with packaging factories
5. UFS testing platform related experience/UFS compatibility testing related experience

1. Design the FPGA board, EVB board, and testing tools required during the chip prototype verification process, along with their schematic diagrams;
2. SIPI measurement and analysis of UFS and other high-speed signals, and output test reports;
3. Maintain the production and debugging tools for UFS modules, and be responsible for troubleshooting and clarifying hardware related issues related to customer complaints and imports;

1. Having a theoretical foundation in electronic circuits and understanding of chip design and verification processes;
2. Familiar with electrical performance testing of UFS modules, experience in UFS prototype verification and EVB verification is preferred;;
3. Capable of system hardware design, familiar with high-speed signal design requirements, and proficient in EDA software such as Orcad, Allegro, PAD, etc;
4. More than 5 years of development experience, with a bachelor's degree or above in electronic information, possessing strong communication and assistance skills;
5. Experience in designing eMMC controllers using FPGA is preferred

1. Responsible for the module verification of FPGA and Silicon in the company's eMMC/UFS project, ensuring the completeness and correctness of the verification
2. Undertake the development and validation of test cases for eMMC/UFS projects
3. Undertake the analysis and resolution of testing issues in eMMC/UFS projects
4. Undertake the improvement and optimization of eMMC/UFS project testing coverage
5. Responsible for writing technical documents.

1. Bachelor's degree or above in key majors such as microelectronics, computer science, communication engineering, etc., with at least 3 years of experience in chip software verification.
2. Familiar with eMMC/UFS/SSD/NAND protocols and software driver development and debugging experience
3. Have a background in IC design companies and complete experience in software verification and development from FPGA to Silicon chips
4. Familiar with Android system development and debugging experience on mobile platforms such as MTK and Qualcomm
5. Familiar with Linux Kernel Driver, Linux kernel, memory management, file system and other related development experience is preferred,
6. Familiar with C/C #, Shell, Makefile, Python and other languages.
7. Possess excellent communication and teamwork skills, as well as strong independent and hands-on abilities

1. Responsible for functional testing, performance evaluation, and reliability analysis of chip products;
2. Write and execute test cases to ensure product quality meets design specifications;
3. Collaborate with the R&D team and participate in the design and optimization of chip testing solutions;
4. Analyze test data, provide quality feedback, and drive problem resolution.

1. Bachelor's degree or above, major in electronic engineering, microelectronics, automation or related fields;
2. Have a certain understanding of the semiconductor industry, with five years or more of semiconductor work experience, possessing good logical thinking and data analysis skills;
3. Strong learning ability, able to quickly master new technologies and tools;
4. Have good communication skills and teamwork spirit, adapt to high-intensity work pace.

1. Responsible for functional testing, performance evaluation, and reliability analysis of chip products;
2. Write and execute test cases to ensure product quality meets design specifications;
3. Collaborate with the R&D team and participate in the design and optimization of chip testing solutions;
4. Analyze test data, provide quality feedback, and drive problem resolution.

1. Bachelor's degree or above, major in electronic engineering, microelectronics, automation or related fields;
2. Have a certain understanding of the semiconductor industry, with five years or more of semiconductor work experience, possessing good logical thinking and data analysis skills;
3. Strong learning ability, able to quickly master new technologies and tools;
4. Have good communication skills and teamwork spirit, adapt to high-intensity work pace.

1. Responsible for the development of ePOP chip FT testing program and logic function verification;
2. Responsible for handling testing exceptions, analyzing and clarifying testing issues;
3. Design evaluation and verification of hardware tooling required for chip testing;
4. ATE testing program time optimization

1. Bachelor's degree or above, with a preference for majors related to electronic information;
2. Have more than 2 years of work experience in the semiconductor field, understand semiconductor testing processes, and be familiar with Advantest/Teradyne ATE testing equipment;
3. Familiar with the basic principles of ePOP memory, familiar with LPDDR product testing is preferred;
4. Proficient in using at least one machine programming language and possessing good programming habits
5. Possess good logical thinking and engineering DOE experimental design and analysis skills;
6. At least 3 years of work experience, recommended 3-5 years;

1) Experience in project management of sealed test suppliers, familiar with APQP process
2) Experience in introducing new products, materials, and processes (BGA substrate products)
3) Familiar with BGA substrate design rules
4) Experience in improving sealing test yield, handling exceptions, and verifying expired materials
5) Familiar with relevant literature on packaging reliability, chip reliability, and corresponding anomaly analysis capabilities

1. 1-5 years of work experience, majoring in electronics related fields;
2. Familiar with packaging device principles and program creation, such as BG, DC, DB, WB, and molding;
3. Proficient in packaging technology, material technology, equipment technology, and supply chain; Proficient in DOE skills such as blades, capillary, EMC, and DAF, and able to solve problems through DOE;
4. Understand the knowledge and process requirements of storage chip products, especially the packaging stack Die technology, SiP technology, and packaging process problem solving. Such as SDBG technology, solving warping problems, etc;
5. Capable of withstanding pressure, proactive, and diligent in thinking.

1. Develop the company's overall market strategy, brand positioning, annual market goals, and budget to support business growth and brand value enhancement;
2. Manage and cultivate the marketing team, clarify division of labor, performance evaluation and capability enhancement, and improve the overall efficiency of the department;
3. Track industry trends, policies, and competitor strategies, collect memory product requirements, provide market insights and decision-making recommendations, and guide the company's embedded new product planning;
4. Analyze the operational efficiency of the product line, coordinate internal and external resources to achieve business goals;

1. Bachelor's degree or above, major in microelectronics, electronic information, communication, etc;
2. More than 10 years of relevant experience, including more than 5 years of experience in embedded EMMC/UFS market or sales or operation, familiar with the supply and demand relationship of the upstream and downstream of the embedded product industry;
3. Passionate, willing to take responsibility, strong sense of purpose, execution ability, stress resistance and leadership, excellent communication and coordination, negotiation, cross departmental promotion and team management skills, market sensitivity, strong innovation consciousness, and result oriented.

1. In the early stage of hardware development, Asic main control function level verification and FPGA verification.
2. After the completion of Asic development, mass production firmware design, specification design, and factory testing passed.
3. When meeting customer production requirements, firmware design meets customer expectations and necessary design changes or new features are added based on customer requirements.
4. After firmware mass production, maintain customer yield and subsequent analysis of defective products and firmware support.
5. Support customer and market development schedule requirements.
6. Internally responsible for training firmware fundamentals and necessary support personnel such as the marketing department, FAE, AE, etc.
7. Responsible for the development of firmware intellectual property and analysis of competitor intellectual property.
8. Responsible for the design and development of firmware simulator development platform

1. Familiar with development and debugging on ARM or RISC-V controllers, able to independently develop and assist in training.
2. Supports verification of AISC and FPGA, can be independently developed, and can assist in training.
3. Proficient in C programming and debugging, assisting with coding review work
4. Experience in firmware development for NAND direction chip products